Quilter was founded by an electrical engineer with a simple goal: to help engineers save valuable time by automating circuit board layout.

More time exploring, less time implementing

PCB layout is tedious and time-consuming. At Quilter, we envision a world where engineers spend more time exploring ideas and less time implementing them in CAD tools. A world where there are virtually no barriers or latency between documenting the requirements of a new physical product, and beginning to explore the tradeoffs and possibilities that could make it a reality.

Our vision is for Quilter to empower engineers and creators to rapidly explore ambitious ideas, understand interconnected constraints, and quickly discover optimal solutions. Quilter is purpose-built to facilitate software-driven creation and iteration, freeing engineers from the burden of manually specifying exactly how a board should be laid out.

Physics as a north star

Most EEs know that just because a PCB design is complete doesn't mean it's going to work.

PCB design fundamentally revolves around physics—electromagnetic behavior, current flow, thermal management, and timing constraints define a board’s success. At Quilter, we aim to anchor every layout decision in these physical realities, guiding our automated processes to generate, evaluate, and improve designs accordingly.

Because humans can't mentally simulate complex interactions like crosstalk or impedance, they often design conservatively, introducing inefficiencies such as oversized boards, unnecessary routing margins, or overly cautious constraints. Quilter combines reinforcement learning with rigorous physics-based rule checks, enabling it to push beyond human limitations to continuously optimize boards for performance, density, and manufacturability.

We're not only pursuing faster PCB layouts—we’re striving for better ones. Our goal is enable Quilter to create leaner, higher-performing boards precisely tailored to their functional requirements, eliminating manual guesswork and iterative redesigns. While Quilter is significantly faster, it is continually evolving to match and eventually surpass the optimization skills of expert human designers.

For details on our current progress and capabilities, see Current limitations.

Iterate early & often

Ironically, it's often faster and cheaper to fabricate and ship a circuit board from halfway around the world than it is to manually design it in the first place. Slow, manual layout processes mean that failed design iterations can significantly delay R&D timelines, causing many teams to adopt overly cautious, linear approaches that limit the ability to learn by building.

Quilter's objective is to transform this approach with the help of automation. By dramatically accelerating PCB layout, Quilter enables engineers to prototype immediately, iterate frequently, and rapidly refine their designs. Instead of cautiously committing to one design, teams can quickly test multiple candidates, identify issues early, rapidly adapt to real-world constraints, and evolve their solutions faster.

The result is a more agile development cycle that emphasizes rapid learning and continuous improvement. Engineers using Quilter don’t just build faster; they build smarter, gaining deeper insights into design tradeoffs, uncovering unexpected solutions, and delivering superior products to market in significantly less time.

Quilter can't design every PCB, but if it can design it, Quilter should.

We've spoken with dozens of world-class hardware design teams and have never encountered an organization where PCB layout wasn't a bottleneck. The reality is that there are far too few experienced layout engineers to meet the rapidly growing demand for PCBs.

The best organizations are experimenting with new automation and AI-powered tools to transform their cultures and become faster, more efficient, and more effective than ever.

There are numerous reasons to start adopting AI-powered automation tools like Quilter; here are a few of the most common ones:

Get to market faster

Quilter dramatically reduces PCB design cycle times by automating the layout process. Traditional manual layouts can take weeks, but Quilter generates optimized design candidates within hours. Accelerating your PCB design cycles enables you to get your products to market faster, seize opportunities ahead of competitors, and respond swiftly to customer feedback and emerging market demands.

Improve designs through iteration

Quilter’s automation allows engineers to quickly and easily test multiple layout iterations, which is often impractical in manual workflows due to time constraints. With Quilter, you can rapidly explore design alternatives and trade-offs, leading to innovative solutions and higher-performing boards. More experimentation facilitates the discovery of the best design outcomes, rather than settling for the first viable option.

Protect your best engineers

Experienced PCB layout engineers are a scarce and valuable resource. Quilter offloads tedious, repetitive tasks so your most skilled engineers can focus on challenging, high-impact design decisions that truly benefit your products. By automating mundane aspects of layout, you safeguard and maximize your team’s most valuable engineering expertise.

Eliminate costly mistakes

Quilter’s physics-based rule checks and automated design processes significantly reduce the human error inherent in manual layouts. Every generated candidate undergoes rigorous validation to ensure compliance with real-world constraints, drastically lowering the likelihood of costly design errors and re-spins. Spending less time fixing mistakes means more resources are available for innovation and growth.

Design and iterate faster

Leveraging AI-driven automation, Quilter provides immediate design iterations without waiting days or weeks for manual updates. By quickly generating multiple layout options, teams can iterate rapidly, test assumptions frequently, and optimize designs efficiently. This AI-driven agility ensures continuous improvement throughout the product development process.

In a rush? Don't like reading docs? We get it.

Here's the minimum information you need to know to submit a layout job to Quilter.

Things you must do

1. Start with a complete schematic. Quilter only handles layout, so we can't do this for you. You must provide a complete schematic in a supported CAD file format (currently Altium, KiCAD, with Cadence coming soon). For more details, see Design your schematic.

2. Generate your input board file. Once your schematic is complete, create a linked board file that includes the essential information Quilter needs to generate your layout, specifically:

   1. A valid board outline

   2. Component footprints

   3. A netlist

3. Pre-place location-sensitive components. Quilter will automatically place and route any components that are outside the board outline, and treats pre-placed components and pre-routed copper as "locked." If your board is fully placed and routed, there's nothing for Quilter to do. For more details, see Prepare your input board file

4. Upload your design files to Quilter. Visit https://app.quilter.ai to create an account and follow the in-app instructions for uploading your design files. For more details, refer to Upload your design files.

Things You Should Avoid

• Do not submit a fully placed and routed board. We understand you may want to test Quilter on a previously completed design, but uploading a finished layout leaves nothing for Quilter to do.

• Do not ask if we can generate a schematic for you. Quilter only creates layouts from complete schematics. If you need assistance generating your schematic, consider using a tool like Flux.ai, CELUS, or Circuit Mind.

Quilter is different from all other ECAD automation solutions because:

1. It understands good and bad physics, eliminating the need for you to program tedious design rules to get good results

2. It explores multiple stack-ups simultaneously and customizes each candidate for the stack-up it's designing with

3. It validates functionality with Physics Rule Checks (PRCs) to ensure that designs are likely to function as intended.

How Quilter is different from traditional ECAD tools

Quilter is different from automation features in an ECAD tool in a few important ways:

1. You specify constraints at the physics level, not the rules level. Most ECAD tools—even those with automation features—do not recognize the fundamental physics constraints present within a schematic. This means that humans must manually define the geometric rules needed to satisfy the physics requirements. Working with Quilter is closer to working with a layout engineer. Our goal is to understand the constraints at the physics level, allowing Quilter to calculate and apply the appropriate geometric constraints for every design variant (and stack-up) that it investigates.

Learn more:

1. Quilter explores many stack-ups and design candidates simultaneously. In most CAD workflows, the stack-up is one of the first design parameters that gets locked down. This means that key decisions impacting electrical performance – such as layer count, material properties, and layer assignments – must be specified before the design process begins. With Quilter, your company's preferred stack-ups and compatible fabrication rules are pre-loaded into the system, enabling Quilter to explore multiple candidates and recommend the stack-up that achieves the best trade-offs between speed, cost, and physics performance.

Learn more:

1. Quilter validates functionality with Physics Rule Checks (PRCs) Quilter provisions dedicated Physics Rule Checks (PRCs) aligned directly with the physics constraints you define in your schematic. This ensures rigorous validation directly tied to electrical performance criteria, such as impedance control, signal integrity, and thermal management.

   When Quilter generates your design, it runs PRCs against each candidate layout and stack-up variation in parallel. PRCs quickly identify potential physics violations, ensuring each design iteration aligns precisely with your specified requirements. This automated validation process significantly reduces manual review efforts and enhances reliability, ensuring that each finalized PCB design consistently meets your performance goals.

Learn more:

Quilter is a design agent, not a "copilot".

Quilter is built to handle PCB layouts from start to finish on its own, while respecting your given constraints. It's not meant to augment your manual design process within existing CAD tools. If you're looking for a tool that can generate, review, apply, or discard arbitrary blocks of schematic or layout, Quilter isn't for you.

Instead, think of Quilter as a reliable and efficient junior layout engineer who's responsible for designing a portion of your team's work. They'll respond to your design feedback in an iterative and diligent way.

Put differently, Quilter's goal isn't to automate 30% of the work for all your designs – it's to automate 100% of the work for the simplest 30% of your designs. This frees you up to focus on the most important and rewarding work within your organization.

Quilter is a submission and review interface, not a CAD tool.

Quilter is designed to make collaboration easy by working seamlessly with the design files from your existing CAD tools. We also return completed layouts in the same file format we receive.

Think of Quilter's web application as a collaboration tool for coordinating design requests with external layout engineers. It's a simple way to upload, review, and exchange files and feedback with your dedicated AI designer.

We use your CAD tool's native features whenever possible to minimize redundant data entry in Quilter. This means we rely on your tool to handle tasks like:

• Updating board files

• Modifying or annotating schematics

• Defining stack-ups and fabrication parameters

• Adjusting component positions

Quilter is a constraint-driven workflow, not a magician.

Users often think that Quilter can look at a PDF schematic and automatically pick up on all the electrical engineering details that may or may not be included in the design.

Although that sounds great, that's not how Quilter works right now. Instead, Quilter is designed to create layouts that meet the constraints set by the input board file and during Circuit Comprehension.

The simplest way to think about this is the following: If a specific design requirement isn't specified in the input file (outline, components, placement region) or in Circuit Comprehension (see Physics Constraints), Quilter will treat it like a generic signal.

We're always working to expand our vocabulary of physics constraints and our auto-detection logic to get closer to this "magic black box" experience. But in the interim, it's important to clearly define your requirements up front to give Quilter the best chance at success.

Quilter is an implementer, not a proofreader.

Quilter's main job is to create layouts that meet the schematic and physics constraints you provide.

Our Physics Rule Checks (PRCs) help ensure consistency with these constraints, but Quilter doesn't check schematic logic or design intent beyond what you specify. We don't automatically review datasheets to verify that you haven't left a pin floating or forgotten to provide bypass to a power pin.

That's why it's crucial to keep applying your internal validation processes to ensure overall design correctness and functional integrity. This includes:

• Schematic reviews

• Design reviews, including running DRCs

• Signal simulation and validation

• Regular fabrication and testing

Welcome to Quilter's documentation.

Here, you'll find an overview of the features and functionality that Quilter offers to help you generate, explore, and optimize fabrication-ready circuit boards in hours instead of weeks.

Jump right in

Keep exploring

Quilter basics

Configuring design requirements

Reviewing layout candidates

Quilter is an automated PCB design software service that leverages generative AI and physics-based optimization to automate and streamline circuit board layout.

Here's how it works:

The basics

1. Quilter handles the entire PCB design process from start to finish. Quilter supports the full design workflow, which includes component placement, routing, and thorough design validation through automated DRC checks and physics simulations.

2. Quilter integrates seamlessly with your current CAD tools. It works directly with both new and existing design files created within your existing CAD tools. This means you can skip using SPECCTRA, ODB, or third-party file converters. Quilter reads and writes to your design files just like your layout engineers do.

3. Whatever you start, Quilter will finish. Quilter works by placing and routing any components left outside your board outline to design your PCB to 100%. This means that you can place or route sensitive components or signals before submitting to Quilter, and it will try to complete the design for you.

How Quilter evaluates layout candidates

There are three key factors that Quilter considers when generating and recommending layout candidates:

1. Completeness We measure "routing completion" for each candidate as the percentage of unrouted pins that have been successfully implemented. Quilter's objective is to place and route all designs to 100%.

2. Manufacturability Quilter's objective is to design using fabrication rules that are fully supported by the specified fabricator, and contain 0 DRC violations.

3. Physics Quilter uses our "Physics Rule Checks" (PRCs) framework to ensure that the sensitive signals and physics constraints you specified during Circuit Comprehension are properly implemented and likely to function as expected.

Quilter's design workflow

Quilter simplifies the PCB design process into clear, straightforward steps: prepare your inputs, define your circuit comprehensions and parameters, review generated design candidates, and download your final layouts for fabrication.

Quilter's primary function is to design PCBs from your existing schematic. So, before you can ask Quilter to generate your PCB, you need to have already designed your schematic.

Here are a few things to know when designing your schematic:

1. Supported CAD platforms: Quilter is currently compatible with KiCAD and Altium, with support for Cadence Allegro coming soon. For more information about our CAD tools support, or to view and vote on our CAD compatibility roadmap, seeCAD Compatibility.

2. Use native object classes whenever possible: Whenever possible, use supported object classes to help identify important signals such as power nets, differential pairs, and important net classes. This will facilitate Quilter's automatic detection of these constraints during Circuit Comprehension.

3. Validate your design before submitting: Quilter's objective is to faithfully represent the schematic that you provide; we do not automatically verify that your design is free from errors. Before submitting to Quilter, be sure to review your schematic as if you were designing the layout yourself.

Quilter can do a lot, but there are many things it can't do yet. For a complete list of supported physics constraints, see Physics Constraints.

Recommended applications

Right now, Quilter can't typically design or optimize boards as well as skilled humans.

Quilter's main advantage is speed—it designs boards much faster than humans, can create multiple layouts at once (for different stack-ups, fabricators, and schematic versions), and can thoroughly test whether a design will work as expected through Physics Rule Checks.

Think of Quilter as a junior EE that can support and supplement your experienced layout engineers. (see Why should I use Quilter?). This makes Quilter well-suited to tackle the following types of designs:

Research & Development

• IC Evaluation Boards: Speed up lab testing with early hardware access

• Design Validation: Shorten functional validation cycles

• Connector Breakouts & Harnesses: Quick turnaround for signal access and subsystem testing

Testing & Automation

• Test Fixtures and Harnesses: Automate time-consuming internal board testing

• Environmental Testing: Create multi-channel IC test and validation boards

Time-Sensitive Layouts

• Schematic-to-Test Workflow: Skip the layout step in test board development

• Agile Prototyping: Iterate quickly with zero layout delay

• Low-Complexity Designs: Free up engineering time and avoid layout bottlenecks

Recommended design parameters

We currently recommend Quilter for the following designs:

General specifications

• <5,000 pins: Quilter is most likely to generate successful candidates for designs with 5,000 pins or fewer.

• Low to medium density designs: Quilter cannot optimize designs better than humans, so very high-density designs (>20% pin density) are best handled manually.

High-speed digital designs

• Signals < 6GHz: Quilter uses quasi-static approximations to calculate design specifications for impedance-controlled signals, which may not be accurate above 6GHz.

Low current and voltage

• Low-voltage designs: Quilter does not currently support the required physics constraints to manage creepage and arcing for high-voltage designs. We recommend manually separating high-voltage signals before submitting them to Quilter.

• Currents <4A: Quilter implements high current nets as sized-width traces using IPC calculations to prevent excessive temperature rise. Until we add the ability to generate power pours, we recommend implementing high current pours manually.

The input board file is the most crucial input to Quilter, defining the degrees of freedom that it can explore when completing your layout job.

Quilter comprehends the existing layout objects in your PCB files, including stack-ups, design rules, keepouts, pours, component footprints, and more. All design elements within the user-defined board outline (pre-placed components, routed traces, copper pours, rooms, etc.) can be designated as fixed constraints and will not be modified by Quilter during layout.

You can find more information on each of the design parameters described below in the Design Parameters section of our documentation.

Required design parameters

Here are the required design parameters for all layout jobs. Make sure to include them in the board file you upload to Quilter:

• Board Outline You need to define a single valid board outline for Quilter to work with. Currently, Quilter can't define or resize the board outline for you, so you must do it yourself. To ensure Quilter recognizes the outline, define it on a specific layer:

  • In Altium, use Mechanical Layer 1 (Mechanical 1)

  • In KiCAD, use the Edge.cuts layer

• Component Footprints Quilter doesn't manage your component footprints, so you need to pre-load them into your board file before submitting. Quilter can't automatically try or choose from multiple footprints or packages for the same component.

• Netlist Lastly, Quilter requires a valid netlist that matches the uploaded schematic. For the best results, please ensure your netlist is up to date with the latest version of your schematic.

Recommended design parameters

Here are some design parameters that aren't strictly required, but are recommended for most layout jobs:

• Pre-placing components (like connectors) Quilter won't move any components you pre-place within the board outline, and will automatically route the rest.

• Not-yet-supported physics constraints Quilter can't handle all physics constraints in all designs yet. If your physics constraint isn't listed in Circuit Comprehension, Quilter won't give it special attention and will route it like a generic low-voltage, low-speed signal. For this reason, we recommend pre-placing and pre-routing any sensitive design elements that Quilter doesn't support yet (like trace antennas or high-speed signals over 6GHz).

Optional design parameters

• Keepouts You can define placement or routing keepouts that Quilter will respect during the design generation process. Read more in Keepouts.

• Copper pours Quilter can preserve and utilize pre-defined pours for external (currently supported) and internal (coming soon) copper layers. Read more in Preserved pours.

• Placement regions Quilter supports the use of placement regions ("Rooms" in Altium) to constrain component placement. Read more in Placement regions.

More parameters coming soon

• Custom stack-ups Soon, you will be able to specify custom stack-ups in your input file that Quilter will use when generating candidates. Read more in Stack-ups.

• Custom fabrication rules You will also be able to specify custom fabrication rules in your input file that Quilter will use when generating candidates. Read more in Fabrication rules.

Reference example

BHASA

Quilter leverages your schematic, board, and project files to collaborate with you and design the ideal PCB layout.

Upload your design files

Once you've created a new job, you'll be asked to upload your input files for Quilter to parse.

Supported input files

Board files

Board files define fixed design parameters. Every layout job needs a "starter" board file that Quilter uses as a starting point for design exploration. This file is a required input that locks in the parameters of your layout and sets the boundaries for Quilter's exploration. Once Quilter finishes your layout job, it returns all completed designs in the same file format in which it received them. After downloading your design, you can open it directly in your CAD tool for further review.

Schematics

Quilter uses schematics to automatically detect physics constraints. With your schematic, Quilter identifies key signals and physics constraints within your design. Schematics also provide more context on how parts on the same net are connected, which helps Quilter inform component placement for groups and physics constraints for components like bypass capacitors, crystals, and switching regulators.

Project files

Project files offer extra details Project files aren't required, but they give Quilter more context about your project, which helps it accurately process complex schematics, DRC rules, and other information. They also make sure your schematic and Quilter-generated board files stay in sync after downloading layout candidates.

Previewing input files

Once you've successfully uploaded, you'll see the following:

• The results of file parsing, including any errors

• A preview of your input board file

• A summary of your job details, such as the number of components and pins for Quilter to route within your design

Once you're confident that Quilter has processed your design files correctly, you can proceed.

Replacing input files

If you run into a blocking error and need to upload new design files, click the "Replace Files" button in the bottom navigation bar. You'll be asked to upload new design files, and you'll need to re-upload all design files at once - not just the ones you want to replace.

Next up in Quilter's submission process is Circuit Comprehension. This step aims to give Quilter insight into the main physics concerns associated with your design.

Quilter tries to automatically detect as many constraints as possible by analyzing object classes in your input files and inferring constraints from your project netlist. However, some constraints need to be manually defined.

Refer to the tables below for a summary of the physics constraints supported by Quilter.

Validating constraints

Quilter uses Physics Rule Checks (PRCs) to determine if constraints defined in Circuit Comprehension are correctly implemented in each layout.

The next step in Quilter's submission process is to review and specify design parameters for your layout. Design parameters help capture your preferences for aspects of the solutions that Quilter explores.

Design parameters come in two types:

1. (Requirements) Parameters defined in the input file. Design parameters defined in the input board file are treated as hard requirements. Quilter will not modify or explore beyond any parameters specified in input files unless explicitly instructed by the user to ignore them.

2. (Preferences) Parameters defined during job creation and submission. Design parameters defined during job creation are considered "preferences" and are usually applied as filters during candidate review. If Quilter can't identify a candidate that meets these preferences, they can be relaxed or eliminated.

Refer to the tables below for a summary of the design parameters supported by Quilter.

Fabrication Parameters

Placement Parameters

Routing Parameters

During the Circuit Comprehension step, Quilter gathers key physics concerns from your design and converts them into various physics constraints.

Quilter tries to automatically identify as many constraints as possible by analyzing the board and schematic files you provide. It uses a range of features from these files, including object and net classes, component and net names, pin names, connections, and the relative position of components.

There are two types of constraints:

Routing Constraints

Routing Constraints impact the properties of traces and guarantee that key electrical characteristics stay within specified limits. Our current routing constraints are:

Placement Constraints

Placement Constraints help keep components tightly placed to reduce trace length. Our current placement constraints are:

Every constraint has its own set of rules for detection and assignment. Knowing these rules can help you resolve edge cases or unexpected behavior. By using specific netclasses, patterns, and naming conventions, Quilter can identify your constraints. You'll find more details on this in the documentation that follows.

Quilter also lets you manually enter any constraints you need to include.

Overview

Once Quilter has finished exploring layout options for a job, it marks it as "complete" and returns one of three different "results."

1. Successful: Quilter successfully identified 100% complete candidates.

2. Unsuccessful: Quilter couldn't find any 100% complete candidates.

3. Failed: Quilter encountered an internal error or issue during the layout job and couldn't return any layout candidates.

On the Candidate Review page, you can:

• Select candidates by clicking them in the left-hand sidebar.

• Inspect candidates by clicking "Detail View" to toggle individual board layers and object types (see Detail view).

• Edit and update filters to include or exclude candidates with specific design parameters (see Filtering).

• Review PRCs for the selected candidate (see Physics Rule Checks (PRCs)).

• Download a candidate to inspect it offline in your preferred CAD tool.

• Duplicate the job to create a new draft layout job with the same files, physics constraints, and design parameters (see Job Actions).

Successful jobs

Jobs are successful if Quilter can place and route at least one layout candidate to 100% without DRC errors.

• If Quilter generated successful candidates within your design parameters, they will be presented by default, with the current top pick highlighted for review.

• If Quilter generated successful candidates, but all were outside your specified design parameters, you will see the notification below.

• Clicking the "Show successful candidates" button will clear your design parameter filters and display the top pick among all candidates generated for your layout job.

Unsuccessful jobs

• If Quilter was unable to generate any successful candidates at all, you will see the notification below.

• Clicking the "Show incomplete candidates" button will clear the filter and present the best <100% candidates generated by Quilter.

• If Quilter was entirely unable to return any layout candidates for your job, you will see the notification below.

• This usually means that Quilter encountered an error or issue while generating your layout job and failed to complete it.

• Clicking the "Send us a message" button will start a chat with the Quilter team so we can resolve the issue for you.

Sorting and filtering

On the Candidate Review page, you can use the design parameter filters at the top to narrow down the visible and recommended layout candidates.

These filters start with your target design parameters, but you can adjust them while browsing the page to refresh the results.

We currently offer design parameter filters for the following:

• Single-sided placements

• Minimum trace width

• Minimum trace clearance

• Layer count

• Fabricator preference

For more information on filtering candidates, see Filtering.

Once you've uploaded valid input files, set physics constraints, and specified design parameters, you're ready to name and submit your layout job.

Quilter will generate a default name for the layout job from your design files, but you can override it here if you prefer.

Once you've submitted your job, you'll see a blank loading screen while Quilter explores the best layout options for your job.

Quilter's time to explore all layout candidates varies depending on the complexity of your job, ranging from 15 minutes to 24 hours. Typically, you'll get the first results back within an hour. Once returned, candidates are instantly available for review in the candidate sidebar.

You'll receive an email when Quilter finds the first successful candidate for your layout job, and another email when the job is finished, along with a summary of the results.

This constraint aims to establish the minimum trace widths needed to prevent excessive resistive heating on traces carrying high currents.

Automatic Detection

Nets with certain attributes will be automatically classified as high current nets. This will include:

• Any net that matches our various patterns for being a voltage or power net.

• Any net in a "Power" netclass.

Recommended Patterns

You can force Quilter to detect a high current net by placing it in a "Power" net class. This is particularly helpful for nets that do not have a voltage-pattern name (like 3V3) but do need to carry a significant amount of current, such as a net that powers a motor.

Defaults

We assign conservative default values to every automatically detected net, assuming they are unlikely to carry high current. If a net is expected to encounter a substantial amount of current, you should specify the maximum in the interface.

Nets with detected voltages under 3V are assigned a 200mA maximum current by default, and nets over 3V receive a maximum of 500mA.

Constraint details

High current nets can be set up in the "High Current Nets" section of Circuit Comprehension. You can add them one by one, match them with regex, or use a netclass.

To define a high current net constraint, you'll need to fill in the following fields:

1. Net name

2. Maximum current (mA)

Quilter automatically completes IPC calculations that consider the specified copper weight and layer thickness for each stack-up to determine the ideal trace width for the net to prevent overheating.

Physics Rule Checks

The PRCs that validate this constraint after compilation are:

The timing-sensitive signals constraint enables precise control over signal delay and maximum delay skew within a set of signals for applications like HDMI and DDR.

These constraints govern the length, width, and relative placement of traces.

This constraint enables impedance-controlled routing for RF nets and other fast, long, or sensitive traces.

Automatic Detection

• Currently, single-ended impedance nets can only be entered manually.

Constraint details

Single-ended impedance control can be applied to nets in the "Single Ended Impedance Signals" section of Circuit Comprehension. You can add them one at a time, match them using regex, or apply a netclass.

To define a high current net constraint, you need to fill in the following fields:

1. Net name

2. Target impedance (we currently support 50Ω and 75Ω)

3. Signal frequency (GHz)

Quilter will automatically perform the impedance control calculations that take into account the specified stack-up's material properties to determine the correct trace width necessary to achieve the specified impedance within a tolerance of 5%.

Physics Rule Checks

The following PRCs validate this constraint after compilation:

These constraints control how components are positioned relative to each other, making sure key pairs are close by.

Generates length and impedance-controlled differential pairs for high-speed digital signals.

Automatic Detection

Nets with specific attributes will be automatically classified as differential pairs. The rules for this classification are:

• Nets must be in differentialpair or synonymous net class (75ohm etc)

• Net names must end in a set of supported paired suffixes that include any of the following:

Recommended Patterns

Quilter starts by searching for accepted net classes, so make sure your pairs are part of an accepted net class. It then filters out net pairs ending with P and N to eliminate any single-ended impedance nets.

Pairs with inline resistors or capacitors

Differential pairs with resistors or capacitors in series will be detected separately by their net names and displayed in the UI as two separate differential pairs. Don't worry, though - these are combined during compilation.

Constraint Details

When Quilter detects a potential differential pair, it presents it for validation as part of the "Differential Pairs" section of the Circuit Comprehension step of job creation.

For each differential pair, you must specify:

• Positive paired net name

• Negative paired net name

• Target differential impedance

• Associated single-ended impedance

• Carrier frequency (in GHz)

Quilter uses this information to determine the appropriate trace width and spacing requirements for the specific stack-up that Quilter is using to generate your PCB layout.

If Quilter has incorrectly identified a differential pair, you can ignore it by clicking the Remove button on the row for that differential pair.

Physics Rule Checks

The PRCs that validate this constraint after compilation are:

FAQs

Physics rule checks (PRCs) validate candidates by ensuring that the critical parameters for each physics constraint are satisfied. Quilter produces PRC reports for every layout candidate it examines.

During Circuit Comprehension, Quilter reads your schematic and input board file to automatically detect Physics Constraints that capture the core physics concerns in your design. Quilter generates a set of PRCs for each identified constraint as a way to evaluate the implementation of that constraint in the layout candidates that it generates.

For example, Differential Pairsare checked to validate appropriate length matching, tightly coupled spacing, and ground plane overlap.

Continue reading for a complete overview of supported Physics Rule Checks and the associated physics constraints that they support.

PRCs by Constraint Type

PRC Results

During the review step, you will see passing and failing PRCs alongside candidates, allowing you to be confident that the design will work as expected. For failing PRCs, the documentation for each PRC provides more insight into the listed error.

For more information on interpreting PRC results, see Reviewing PRCs.

This constraint ensures tight ground return loops for input and output paths, minimizing EMI and voltage ripple.

This is a special case that applies only to switching converters with a specific configuration, consisting of two or more external capacitors (input and output capacitors) and an external output inductor. Other configurations are not supported and are generally unnecessary for achieving good results.

During compilation, this constraint requires the three passive components to be positioned as closely as possible to the converter package.

Automatic Detection

Certain switching converters will be detected automatically:

• The reference designator for the switching converter must begin with U

• The switching converter output connects to an inductor with a reference designator that begins with L

Quilter can handle regulator configurations with multiple input or output capacitors, but will somewhat arbitrarily select one for the purposes of constraining switching coverter placement.

Constraint Details

Set up switching regulator constraints in the "Switching Converters" section of Circuit Comprehension.

To add a switching converter constraint, enter the following information:

• Switching converter (reference designator, must begin with U)

• Output inductor (reference designator, must begin with L)

• (optional) Input capacitor

• (optional) Output capacitor

If Quilter did not automatically detect your Crystal Oscillator, you can add it manually by pressing the Add button.

Physics Rule Checks

The PRCs that validate this constraint after compile are:

This constraint guarantees that bypass and decoupling capacitors are placed close to the correct pins.

Automatic Detection

When bypass capacitors are connected between a component and ground, they're automatically detected.

They're assigned to a parent pin using this priority order:

1. Explicit connection by wire in the schematic

2. Parent pins with voltage-type names (e.g. Vin)

3. If a capacitor is connected to multiple pins of the same name, it's split equally across them.

Recommended Patterns

For a capacitor to be assigned correctly to a parent pin, the best approach is to connect it directly to the pin in the schematic with a wire. Other patterns, such as blocks of capacitors linked by a net label or power port, will still be interpreted using our rules, but with lower priority.

You can also manually edit the assignment in the interface.

Constraint Details

Configure bypass capacitor constraints in the "Bypass Capacitors" section of Circuit Comprehension.

To set a bypass capacitor constraint, fill in the following fields:

• Capacitor (reference designator)

• Component being bypassed

• Pin on that component being bypassed

• Capacitance

Quilter automatically places capacitors with smaller capacitance values closer to power pins for a low-latency, low-impedance path. It can also position a single capacitor to bypass multiple pins on the same IC.

Physics Rule Checks

The PRCs that validate this constraint after compilation are:

FAQs

This constraint is designed to position oscillators near their drivers, minimizing phase noise and startup problems.

Automatic Detection

Crystal oscillators are automatically detected if they meet the following criteria:

• A crystal oscillator component with a reference designator begins with an X or Y

• Both pins of the crystal oscillator are directly connected to the same parent component or driver.

Constraint Details

Set up crystal oscillator constraints in the "Crystal Oscillators" section of Circuit Comprehension.

To add a crystal oscillator constraint, enter the following information:

• Crystal (reference designator)

• Parent component

• Parent pin 1

• Parent pin 2

If Quilter did not automatically detect your Crystal Oscillator, you can add it manually by pressing the Add button.

Physics Rule Checks

The PRCs that validate this constraint after compile are:

Description

For the Net Width comprehension, the expected width is explicitly defined, while for the Single-ended Impedance Signal comprehension, the nominal width is determined based on impedance and stackup characteristics.

Passing Criteria: This check passes if the length of trace segments that are outside the width tolerance falls below an acceptable percentage. If the acceptable percentage is not met (in the case of short nets), a fallback acceptable length tolerance is used. If neither of these criteria is met, the failed percentage is reported

Reporting Units: Length PERCENTAGE (%) or CENTIMETERS (cm)

Examples

Passing Messages:

Failing Message:

Physics Justification

• Controlled Impedance

  The trace width, along with the dielectric material and distance to the reference plane, determines impedance. An incorrect width can cause reflections, signal distortion, and poor signal integrity.

• Current Carrying Capacity

  The trace width affects how much current the trace can safely handle without excessive heat. A too-narrow trace can lead to overheating and potential damage.

• Electromagnetic Interference (EMI)

  Proper trace width reduces EMI by maintaining consistent transmission line behavior, which cuts down on noise and radiation.

• Design Consistency

  The layer stackup defines the PCB's physical and electrical properties, so deviating from specified widths can throw off expected performance.

Helpful Definitions

• Electromagnetic Interference (EMI) Unwanted electromagnetic radiation or coupling that disrupts the operation of nearby electronic devices or circuits.

Description

Passing Criteria: This check passes when the absolute length difference between the two sides of the differential pair falls below a specified tolerance.

Reporting Units: Length in CENTIMETERS (cm)

Examples

Passing Message:

Failing Message:

Physics Justification

Length matching in differential pair traces is crucial for ensuring that the signals arrive at the receiver simultaneously, thus maintaining their phase alignment. In particular:

• Noise Cancellation

  Differential pairs rely on signals being exact opposites. If they’re misaligned, they cannot cancel external noise effectively, which reduces signal integrity.

• Avoiding Mode Conversion

  Length mismatches can convert the differential signal into common-mode noise, leading to interference and degraded performance.

• Signal Timing

  In high-speed circuits, even small timing differences caused by mismatched lengths can introduce errors in data transmission.

Helpful Definitions

• Phase Alignment

  This refers to two signals in a pair (like a differential pair) staying in sync and reaching their destination at the same time. Misalignment can distort the signal and cause errors.

• Mode Conversion

  This occurs when differential signals (opposites) lose their balance because of mismatched traces, causing part of the signal to change into common-mode noise, which is unwanted.

• Common-Mode Noise

  This is noise shared by both signals in a pair, caused by imbalances or interference, disrupting the signal the circuit is trying to read.

Description

Passing Criteria: This check passes if less than a specified percentage of the length of traces within the high current net has a temperature rise below a given threshold.

Reporting Units: Length Percentage (Tolerance: Celsius)

Examples

Passing Message:

Failing Message:

Physics Justification

Minimizing the temperature rise of high-current nets is important for the following reasons:

• Resistive Heating (Joule Heating)

  High current flowing through a trace causes I²R losses, where electrical resistance (R) converts current (I) into heat. Excessive heat can damage the PCB or nearby components.

• Board Performance

  An increased temperature (T) raises the resistance of the trace (R∝T), leading to more heat in a feedback loop, which can degrade signal integrity and power delivery.

• Thermal Expansion

  Heat causes the PCB material to expand, potentially resulting in mechanical stress, delamination, or cracks in the copper traces.

• Electromigration

  High temperatures accelerate electromigration, where metal atoms move due to current flow, degrading the trace over time and potentially causing failure.

Helpful Definitions

• Electromigration The gradual movement of metal atoms within a conductor caused by the flow of high electrical current. This occurs because the momentum transfer from moving electrons pushes atoms along the current's path. Over time, it can create voids or buildup in the conductor, leading to increased resistance or signal degradation.

Description

Relevant points are defined outside a small margin provided in order to account for cutouts around the attached pins and vias.

Passing Criteria: This check passes if there is complete overlap of both sides of the differential pair with the ground plane on the layer below it at all locations except the last 2*clearance length endpoints of the trace paths.

Reporting Units: BOOLEAN

Examples

Passing Message:

Failing Message:

Physics Justification

Sufficient ground plane coverage below all traces in a net addresses the following:

• Signal Return Path The ground plane provides a low-impedance return path for current, which reduces electromagnetic interference (EMI) and enhances signal integrity.

• Controlled Impedance The space between the trace and the ground plane determines the trace's impedance. This must remain consistent for high-speed signals to prevent reflections and distortion.

• Noise Shielding The ground plane acts as a shield, minimizing external noise and preventing crosstalk—the interference between signals.

Description

Passing Criteria: This check passes is the pin distance falls below a specified tolerance

Reporting Units: CENTIMETERS (cm)

Examples

Passing Message:

Failing Message:

Physics Justification

Minimizing the pin distance is important because it:

• Reduces Trace Lengths Shorter traces mean lower parasitic inductance and resistance, which improves signal integrity and power delivery.

• Minimizes Loop Area Smaller loops reduce susceptibility to electromagnetic interference (EMI) and radiated noise.

• Improves Routing Efficiency Compact pin placement contributes to cleaner and more manageable routing, especially in densely designed circuits.

Description

Passing Criteria: This check passes if the number of vias on the path between a bypass capacitor and its associated pin is below a specified threshold.

Reporting Units: COUNT

Examples

Passing Message:

Failing Message:

Physics Justification

Layer switches on trace paths between pins introduce parasitic inductance, which:

• Reduces Filtering Effectiveness

  Parasitic inductance degrades the ability to respond to high-frequency noise.

• Increases Impedance

  Vias add impedance to the path, disrupting the low-impedance connection needed for proper decoupling in the case of bypass capacitors.

• Affects Power Stability

  Higher impedance and slower response times can cause voltage fluctuations at the pin, impacting the power integrity of the connected component.

Helpful Definitions

• Parasitic Inductance The unintended inductance that arises from the magnetic field created by current flow and opposes changes in current, especially at high frequencies. It can degrade circuit performance by slowing responses and causing noise.

• Decoupling The use of capacitors placed near pins to stabilize voltage and filter out noise on the power supply.

Description

Passing Criteria: This check passes if the calculated trace length falls below a specified tolerance

Reporting Units: CENTIMETERS (cm)

Examples

Passing Message:

Failing Message:

Physics Justification

Minimizing the trace length is important because:

• Reduced Parasitic Inductance:

  Longer traces introduce parasitic inductance, degrading the ability to respond to high-frequency noise.

• Improved Noise Filtering:

  A short trace allows a capacitor to quickly supply or absorb current, effectively stabilizing the voltage and filtering noise.

• Lower Impedance Path:

  Shorter traces decrease impedance, ensuring robust and efficient power/signal delivery to the pin.

Helpful Definitions

• Parasitic Inductance The unintended inductance present, which arises from the magnetic field created by current flow and opposes changes in current, especially at high frequencies. It can degrade circuit performance by slowing responses and causing noise.

Description

Passing Criteria: This check passes if the trace length of uncoupled spacing between the two trace paths in the nets of interest is below a specified length tolerance

Reporting Units: CENTIMETERS (cm)

Examples

Passing Message:

Failing Message:

Physics Justification

The distance between differential pairs is important because it affects how well they work together and resist interference. A few reasons why this is important include:

• Electromagnetic Coupling

  Differential pairs create small electromagnetic fields as signals travel. If the traces are too far apart, they won’t couple well, reducing their ability to cancel out external noise. Conversely, if they’re too close, they might interfere with each other or with other signals.

• Crosstalk

  If differential pairs are too close to other traces, their signals can interfere with neighboring traces (or vice versa), causing crosstalk, which is unwanted noise from other signals.

• Impedance Control

  The spacing affects the differential impedance, which is the resistance the signals encounter. Maintaining a specific distance ensures the impedance remains consistent, helping the signal to stay clear and fast.

Helpful Definitions

• Crosstalk

  Crosstalk is unwanted interference caused by signals in one trace inducing noise into a nearby trace. It happens because the electromagnetic fields from one trace can "leak" into another, disrupting the signal.

• Differential Impedance

  Differential impedance is the combined resistance a differential pair encounters as signals travel together. It's determined by the trace width, spacing between the traces, and the surrounding materials. Proper impedance ensures the signal integrity without reflections or losses.

Overview

Stack-ups describe how layers and materials are arranged on a printed circuit board (PCB). A complete stack-up includes the following information:

• Board thickness

• Number of layers Purpose of each layer (signal, ground, power)

• Type of material used in each layer, including key details like dissipation factor (Df) and dielectric constant (Dk)

• Thickness of each layer and copper layer

• and more!

All CAD tools supported by Quilter let you specify these details as part of your board's stack-up.

How Quilter uses stack-ups

Quilter guarantees that every candidate it generates is manufacturable by compiling for a specific stack-up that's associated with a particular fabricator profile. This also means that physics constraints that depend on stack-up details – like differential pairs and high current nets – are always tailored to the stack-up details Quilter is compiling for.

Quilter can read and write stack-up information to the native CAD files you upload and download from our platform. Stack-ups specified in input files can be used to constrain Quilter's search space, and Quilter always writes information about the stack-up it used to the downloaded board file to support a thorough design review.

Pre-supported stackups

For each layout candidate Quilter generates, it defines a specific stack-up and associated material properties. These are used to test routing strategies and complete the necessary physics calculations for implementing signals that are sensitive to physics, such as differential pairs.

We've pre-defined standard stack-ups with our preferred fabrication partners, including OSH Park, JLCPCB, MacroFab, CircuitHub, and American Standard Circuits.

Viewing stack-up details

At the bottom of the candidate reviewer, you can view the stack-up and fabricator used to create your layout candidate. To learn more about the stack-up, simply click through to our help documentation.

How to specify

As a preference

Quilter supports preferential filtering based only on layer count. On the design parameters page, select the layer counts you want to prioritize in candidate review, and Quilter will use them as filters during candidate review, which can be updated or removed.

This allows you to view 4-layer candidates across multiple fabricators, for example. We plan to add support for more stack-up related parameters, such as board thickness and copper weight, soon.

As a requirement (soon)

Coming soon, you'll be able to limit Quilter's exploration to a specific stack-up. This can be done by:

• Providing all the necessary details for your stack-up in the input file you upload to Quilter

• Choosing the "Use my custom stack-up" option on the Design Parameters page in the submission workflow

Typically, in a traditional design workflow, fabrication parameters are fixed before the design process starts. They serve as constraints for the layout to work within, rather than as adjustable parameters that can be optimized along with placement and routing.

Quilter reverses this approach, allowing you to consider the fabricator, fabrication rules, and even the stack-up as variables within the solution space that Quilter can explore and optimize.

By switching fabrication parameters from constraints to optimization variables, you can do amazing things with Quilter, including:

1. Compile for multiple fabricators. Create a single design that can be compiled for multiple fabricators and stack-ups, then send it to the manufacturer with the lowest cost or fastest turnaround time.

2. Analyze performance vs. speed and cost. Compile the same design with different fabrication rules (3.5 mil, 5 mil, and 6 mil) to explore the trade-offs between physics performance, layer count, and fabrication cost/speed.

3. Optimize board density. Compile the same design with various board outlines to examine the relationship between board size, component density, and layer count/routability.

For more information on fabrication parameters, continue reading or check out the table below.

Overview

Fabrication rules are a subset of design rules that define the minimum geometric thresholds a fabricator can apply when manufacturing your circuit board.

Specifically, Quilter's fabrication rule profiles include the following:

• Minimum trace width

• Minimum trace clearance

• Minimum drill hole size

• Minimum annular ring size

• Minimum edge-to-copper clearance

How Quilter uses fabrication rules

Quilter uses fabrication rules in two key ways:

1/ To explore the design's possibility space

When Quilter starts a layout job, it tests a range of candidates by starting with various stack-ups from different fabricators and applying a range of minimum fabrication rules. These rules span from very aggressive (as small as 3 mil trace widths) to more conservative (as large as 10 mil trace widths). This helps Quilter understand the fabrication ruleset that will achieve the best balance of completeness, manufacturability, and performance for your design. Complete candidates that pass all physics rule checks (PRCs) with the most conservative fabrication rules are automatically recommended for selection during the candidate review process.

2/ To ensure candidates are free of design issues

By defining fabrication rules against the minimum specifications for each of our fabricator partners, Quilter also ensures that each candidate can be successfully manufactured by that partner. Quilter's DRC engine performs design rule checks throughout the candidate generation process. A final ECAD-native DRC check is also run on each complete candidate before it's delivered to the Candidate Reviewer for final selection.

Pre-supported fabrication rules

Quilter's fabrication rules have been defined in partnership with top fabricators and can be bucketed into a few different groups:

• "Extended" fabrication rules These design rule profiles are established based on our partners' minimum fabrication capabilities. They are typically only available with boards that have larger layer counts and often incur higher costs and longer lead times.

  • Example: Oshpark (5 mil traces), JLCPCB (3.5 mil traces), MacroFab (3 mil traces) ​

• "Standard" fabrication rules These design rule profiles are established based on minimum fabrication capabilities for "standard"-level services. They are more conservative and generally support lower-cost, quick-turn fabrication services and boards with fewer layers.

  • Example: Oshpark (6 mil traces), JLCPCB (5 mil traces), MacroFab (5 mil traces) ​

• "Conservative" fabrication rules In most designs, it’s important to avoid designing to the minimum requirements. These fabrication rules are well-supported by all our fabrication partners. Quilter consistently recommends candidates with the most conservative fabrication rules that are also fully complete and contain 0 DRC or PRC (physics rule check) violations.

  • Example: 8 and 10 mil trace widths/clearances

Viewing fabrication rule details

At the top of the candidate reviewer, you'll see the fabrication rules used to generate your layout candidate.

How to specify

As a preference

Quilter provides customized fabrication profile setup and implementation as a service to all paying customers. Customers can collaborate with Quilter to create one or more custom fabrication profiles that use the stack-ups and fabrication rules that match their typical fabrication partners' capabilities.

As a requirement (soon)

Soon, you will be able to limit Quilter's exploration to a specific fabrication rule profile. You will achieve this by:

• Specifying all of the required details for your fabrication rules in the input file you upload to Quilter

• Selecting the "Use my custom fabrication rules" option from the Design Parameters page in the submission workflow.

Overview

Quilter treats all components within the board boundary at upload as "pre-placed."

As a core principal rule, Quilter doesn't change the position or orientation of pre-placed components.

When compiling, Quilter will place and route components that were left outside the board outline.

Why should I pre-place components?

There are a few reasons to pre-place components:

1. Location-sensitive components One main reason to pre-place a component is to make sure that location-sensitive parts, such as mechanical pieces and connectors, end up in the right spot.

2. Unsupported physics constraints If Quilter doesn't currently support a physics constraint that demands precise or highly organized placement of components, you can manually position individual components or groups to ensure they're placed correctly.

3. "Saving your progress" When working with Quilter, you might find that you like certain elements of a layout candidate, but not the overall design. Once you've downloaded a candidate, you can choose to keep the routing and placements you like, remove the rest, and resubmit to Quilter to save your progress towards a fabrication-ready design.

How to specify

As a preference

Components inside the board outline are locked and can't be moved or rotated by Quilter during compilation. We won't change pre-placed components, even if they stop Quilter from finishing a layout job successfully.

If you wish to constrain component placement to pre-specified sides or areas within your board outline, see Placement regions.

As a requirement

Locking the position and rotation of a component is easy: just pre-place it within the board outline and upload your input file to Quilter.

Overview

When exploring placement solutions, Quilter will automatically flip components between the top and bottom layers unless they are specifically associated with a placement region on that layer.

For every layout job, Quilter automatically tries to create single-sided layout candidates if it finds a valid placement solution that uses only one side.

How can I force double-sided placements?

If Quilter is only producing single-sided candidates and you would like to compel Quilter to utilize both sides of the board, you can:

1. Shrink your board outline, which will prompt Quilter to consider double-sided placement candidates.

2. DefinePlacement regions that associate desired components with the bottom side of the PCB.

3. Pre-place components on the bottom side of the board.

How to specify

As a preference

Quilter allows for preferential filtering by single-sided placement. To do this, go to the design parameters page and check the "Show single-sided layouts only" option. This will apply a filter during candidate review that you can remove if we don't generate any single-sided candidates.

As a requirement

Quilter will automatically try single-sided candidates first and only switch to double-sided placements if it can't find a valid solution. To make Quilter only explore single-sided placements, create Placement regions that include all components and link them to the top layer of your PCB.

Quilter is a fully automated end-to-end designer that handles both placement and routing.

Placement parameters let you control where Quilter places components on your board, ensuring the layout candidates it generates meet your design requirements and preferences. Specifically, you can use placement parameters to:

1. Restrict placement to one side for easy assembly and testing

2. Enforce a specific "floor plan" that meets 3D spatial requirements and signal flow

3. Lock components in place during iterations so that you can save your work throughout the design process

Check out the table below or keep reading to learn more about supported placement parameters.

Quilter is a fully automated, end-to-end designer that is capable of both placement and routing.

Routing Parameters help you influence and control how Quilter implements your board's netlist, to ensure that the layout candidates Quilter generates meet all of your electrical requirements and preferences.

More specifically, routing parameters can be used to:

1. Define a custom stack-up that includes power planes dedicated to specific nets within your design (coming soon)

2. Assert custom net widths for specific nets or net classes to override or supplement the Fabrication rulesfor a particular layout job

3. Lock routing strategies during iteration, so you can "save your work" throughout the design process

Continue reading or explore the table below to learn more about supported routing parameters

Overview

Quilter considers all traces and vias within the board boundary at the time of file upload to be "pre-placed".

As a foundational rule, Quilter does not alter the path or position of pre-placed traces and vias. Quilter will not automatically delete unconnected or orphaned trace segments, so be sure to remove them from your input file before submission.

During compilation, Quilter will strive to place and route all components that are not already routed. If a pre-routed trace segment is incomplete, Quilter will attempt to finish it during routing.

Why should I pre-route traces?

There are a couple of reasons to pre-route components:

1. Unsupported physics constraints If Quilter doesn't yet support a physics constraint that needs sensitive or highly organized signal routing, you can manually pre-place and route individual components to ensure they work correctly.

2. "Saving your progress" When iterating with Quilter, you might find that you like certain parts of a layout candidate, but not the overall design. Once you've downloaded a candidate, you can choose to keep the routing and placements you like, remove the rest, and resubmit to Quilter to save your progress toward a fabrication-ready design.

How to specify

Locking the path of a copper trace is easy – just pre-route it within the board outline and upload your input file to Quilter.

Overview

Placement Regions allow you to limit component placement by ensuring that components tied to the region are positioned within its geometric boundaries during compilation.

To set up a Placement Region, define a polygon object in your native CAD input file, place it so it overlaps the board outline, and link it to either the top or bottom layer.

Once you've uploaded your input file, you can assign components to that Placement Region, which tells Quilter to place those parts within the region's boundary.

Why should I pre-place components?

There are a few reasons to pre-place components:

1. Location-sensitive components Pre-placing a component mainly ensures that location-sensitive parts, such as mechanical components and connectors, are positioned correctly.

2. Unsupported physics constraints If Quilter doesn't yet support a physics constraint that requires precise or highly organized placement of components, you can manually pre-place individual components or groups to ensure they come out correctly.

3. "Saving your progress" When iterating with Quilter, you might find yourself liking parts of a layout candidate but not the entire design. After downloading a candidate, you can pick the elements you like, remove the rest, and resubmit to Quilter to save your progress and move closer to a fabrication-ready design.

How to specify

As a preference

Quilter won't put a component in a placement region outside of that region, even if it blocks Quilter from finishing a layout job.

As a requirement

Define a placement region by following these steps for your CAD tool:

Quilter will start presenting candidates for your review as soon as the first one is complete.

Depending on the setup of your layout job, Quilter may return hundreds of candidates that were part of its exploration of your design. It recommends the top candidates that have been returned so far.

Quilter offers various tools to help you easily explore, select, and refine the layout candidates it generates.

Finding the right candidate

Inspecting candidates

Offline review & iteration

Overview

Unlike Pre-routed traces Quilter does not automatically preserve copper pours that are present within the board boundary at the time of file upload.

Instead, Quilter only preserves copper pours that are represented in the "preserved pours" table during Circuit Comprehension. All other pours on internal or external copper layers are deleted and regenerated by Quilter.

Preserved pours can be added manually during job setup. In the near future, Quilter will automatically preserve pours that are marked as "locked" in the input file.

Why should I use preserved pours?

There are a number of reasons to preserve copper pours:

1. Quilter can't generate its own pours (yet). As of today, Quilter can't yet generate its own power pours. Our preserved pours feature allow you to generate pours manually ahead of time, and finish a layout job with Quilter's help.

2. "Saving your progress". If you are iterating with Quilter, you may find that you like elements of a layout candidate, but not the whole design. After downloading a candidate, you can choose to preserve the routing/placements you like, unplace and unroute the rest, and resubmit to Quilter to "save your progress" towards a fabrication-worthy design.

3. (Coming soon) Define advanced power planes for custom stack-ups. Preserved pours will allow you to generate custom stack-ups that include custom and split power planes that supplement or replace the power planes recommended by Quilter.

How to specify

To specify a preserved pour, follow these instructions:

1. Create the pour. Create or identify an existing pour in your input board file that you wish to preserve during compilation.

2. Upload your input file. Save and upload the input file to Quilter. You can confirm that the pour was parsed correctly by toggling the "Pours" layer in the board preview.

3. Add your "Preserved Pour". Add your preserved pour by name to the "Preserved Pours" comprehension when setting up your layout job.

Net Widths

In general, Quilter's development philosophy is to understand your design at the Physics Constraints level so that design parameters, such as Net Widths, can be independently managed on a constraint-by-constraint basis by Quilter, as opposed to using traditional design rules that can be overly conservative and cumbersome to define.

That said, Quilter supports a "Net Widths" constraint that can be used to specify specific trace widths for individual nets and net classes within your design.

If you want to assert custom Fabrication rules for your design, we recommend waiting until our support for custom stack-ups and design rules is complete.

How to specify

To specify a preserved pour, add the specific net or net class to the "Net Widths" constraint during Circuit Comprehension by clicking the Add, Add multiple, or Add by netclass buttons beneath the table.

Overview

Quilter integrates directly with keepouts defined in your CAD tool, so it won't place or route signals in areas you've marked off on your PCB.

That's pretty much it – just add a keepout to your board, and we'll steer clear of it!

Why should I use keepouts?

Keepouts can help Quilter define the desired boundaries for design activity. Some common reasons to use keepouts include:

1. Reserving space for mechanical features, such as mounting holes, connectors, and heat sinks, where traces or components shouldn't go.

2. Protecting sensitive areas, like RF zones, from routing that could affect signal integrity.

3. Enforcing design intent, such as keeping parts out of high-heat zones or away from noisy power areas.

How to specify

Uploading a keepout to Quilter for layout candidate generation is easy. Just define it in your CAD tool as you normally would and save it along with your other design files when setting up a new layout job.

Overview

Candidate details capture important metadata about your design that can be used to sort, filter, and identify layout candidates that best meet your design criteria.

Available metadata

Quilter presents the following candidate metadata for review, some of which can be used to create filters on the candidate review page.

Quilter gives you the ability to generate layouts that utilize stack-ups and fabrication rules sourced directly from fabricators.

Fabricator profiles

A fabricator profile contains information about the stack-ups and fabrication rules that a PCB manufacturer supports and that Quilter will use when exploring layouts intended for that fabricator.

Fabricator profiles consist of:

• Stack-ups, which define the physical parameters of your board, such as layer count, copper weight, and key material properties impacting physics calculations.

• Fabrication rules, which determine the geometric limitations of the particular fabrication service that the fabricator will use to manufacture your layout. Examples include minimum copper trace width and clearances.

Each candidate that Quilter explores references a stack-up and fabrication rule set supported by the fabricator, as defined by the fabrication profile. We refer to this intersection of stack-up and fabrication rulesets as a "compile target."

Example: OSH Park

Here's an example "Fabrication Profile" for JLCPCB, one of our Pre-supported fabricators, that specifies 12 unique Oshpark compile targets that align against OSH Park's fabrication service capabilities and can be explored in parallel each time Quilter generates layout candidates.

Custom fabrication profiles

How to specify

As a preference

You can easily filter the candidates that Quilter presents to view only those compatible with your target fabricator. On the design parameters page, select the fabricators you wish to prioritize in the candidate review, and Quilter will apply them as filters during the review process, which can be updated or removed.

As a requirement

Currently, the only way to specify that Quilter targets a specific fabricator profile (stack-ups plus fabrication rules) as a requirement is to become a Quilter customer. As mentioned earlier, we offer customized fabricator profiles to all paid customers.

Pre-supported fabricators

For convenience, Quilter has pre-defined fabrication profiles for each of the following fabricators:

Design Parameters are key design considerations that determine the options available to Quilter when generating layout candidates. These parameters cover everything from high-level questions, such as who will manufacture your board, to low-level details, like where to place a capacitor.

Once your board's Design Parameters are fully defined, your layout candidate is complete. Your input file is the main way to tell Quilter which Design Parameters (design elements) are fixed and which remain flexible for Quilter to explore.

We typically categorize Design Parameters into three main groups:

1. Fabrication parameters – who will manufacture your board, and what fabrication capabilities and materials do they have?

2. Placement parameters – where do components go on your design?

3. Routing parameters – how should components be connected?

As mentioned in our introduction, Design Parameters can be either requirements that Quilter must follow or preferences that act as filters on the solution space Quilter explores.

Check out the tables below to learn how to control Quilter's options and key parameters of the candidates it generates.

Fabrication

Placement

Routing

Overview

Quilter provides straightforward filters that let you quickly pinpoint candidates that meet your design criteria.

When you submit your layout job, if you include Design Parameter preferences (see Specify design parameters), they'll be automatically used as filters to help you narrow down to the candidates that match your preferences.

Using filters

Here are a few notes on using filters:

• Updating filters changes the layout candidates visible in your candidate list in real time.

• You can click the Reset Filters button to clear all filters and view all candidates explored by Quilter throughout the layout job.

• The Show 100% routed candidates only filter is automatically applied to all jobs, and you can manually clear it at any time to see <100% routed layout candidates.

Supported filters

Overview

The Quilter's recommendation (sorting) algorithm aims to assist users in quickly identifying the best boards that Quilter explored during the layout job.

The sorting and filtering functions work together to help you efficiently find the best board that aligns with your design preferences.

Default sort

Quilter's default sort orders candidates based on the following information:

1. Highest routing completion

   1. max Routing completion, DESC

2. Most conservative fabrication rules

   1. max Minimum trace width, DESC

   2. max Minimum trace clearance, DESC

   3. max Minimum drill size, DESC

   4. max Minimum via size, DESC

3. Fewest layers

   1. min Layer count, ASC

4. Most efficient routing

   1. min Shortest traces, ASC

More sorts coming soon

Quilter will soon support new sort options that better incorporate PRC results to inform candidate recommendations. These options will include:

1. Recommended: Candidates with the best balance of PRCs and manufacturability

2. Best PRCs: Candidates with the highest raw passing PRC count

3. Easiest to Fab: Candidates that adhere to the most conservative fabrication rules

4. Fewest Layers: Candidates that use the fewest layers for lower costs and faster lead times.

Overview

Every layout job comes with a PRC report that summarizes the results of physics unit tests Quilter runs for each of the defined layouts in your job.

The goal of PRCs is to help assess whether the layout candidate generated by Quilter is likely to perform as expected.

Interpreting PRC results

How PRCs are organized

Quilter's PRC reports are generated for every candidate Quilter considers.

The PRC results are organized by the parent constraint type they support – for example, bypass capacitors, differential pairs, and so on. You can expand or collapse the individual results for each constraint group by clicking the header for that constraint type.

A summary of the aggregated PRC results is also available on the right side of the constraint group header. You can filter the PRC checks shown to view all of them (the default) or only the ones that failed to pass.

Reading individual results

Along with grouping by constraint type, PRC results are also organized by the physics constraint they support. You can see information about the associated constraint on the left side.

PRCs that pass are shown in green, while those that fail are displayed in red.

Each PRC includes:

• The name of the check that was run

• The check's result

• The tolerances that indicate a passing result for that check

A complete list of PRCs, including the physics justification and assessment methodology, can be found in Physics Rule Checks (PRCs).

Overview

Once you've reviewed a layout candidate, you can download it for offline inspection. To download a candidate for offline review, click the "download" button at the bottom right of the candidate preview pane.

Layout candidates are always returned in their original native file format, making it easy to inspect and review them offline. This way, you can:

• Run your own design rule checks (DRCs)

• Validate the design with simulation

• Send the design to colleagues for feedback and approval

How billing works

Quilter's billing unit is called a "pin". This corresponds directly to the number of pins listed in the input files used to set up a layout job. Quilter customers buy "pin" allotments, which they can use to access the layout candidates created by a job.

Submitting, reviewing, and revising layout jobs in Quilter is free. Customers only get billed for "pins" when they download one or more candidates from a job.

When you download a candidate, your pin allotment decreases by the number of pins in the input file for your design. For example, if your input board file has 1,000 pins, you'll use 1,000 pins when you purchase the first candidate from your layout job.

If your candidate download triggers billable activity (it is the first candidate you've downloaded from that layout job), a confirmation dialogue will present the number of "pins" required to purchase the results of the layout job.

Purchased layout jobs

Quilter simplifies finding and identifying layout jobs you've purchased:

• "Downloaded" filter On the home page, click the "Downloaded" filter to view your purchased layout jobs

• "Downloaded" icon Any downloaded layout jobs will show a "Downloaded" icon next to the job name, indicating you can't download them again.

Overview

Quilter's "Detail View" lets you take a closer look at specific board layers and object classes within your layout candidate.

You can access the full-screen "Detail View" by clicking the "Detail View" button in the top-right corner of the board preview component.

Supported controls

Quilter's board viewer includes the following controls to help with inspecting and reviewing Quilter-generated layout candidates:

Layer/object navigation

Quilter's tag tree picker provides access to all board object classes through two different organizational views:

1. Control object visibility by layer The first set of controls lets you toggle the visibility of all objects on a specific layer or expand the nested tree structure to toggle the visibility of individual objects on that layer. These toggles are always available, even if there are no objects on that layer – for example, if there are no pours on LAYER_1.

   Layer-level toggles are helpful for inspecting individual layers of your PCB at a time.

2. Control global object visibility The second set of controls lets you toggle the global visibility of specific object classes across all layers. These toggles are always available, even if there are no instances of that object in your design – for example, if there are no placement regions defined for your layout job. Global-level toggles are useful for inspecting trace paths that span multiple layers of your board.

Overview

Job details give you a high-level overview of the inputs and preferences you set when you submitted your layout job.

This info helps you understand how complex the job is that you're asking Quilter to handle (see Current limitations), as well as the specific parameters used to generate candidates.

Job details modal

Press the "Details" button in the top right corner of the job details header to view the job details used to generate your layout job.

Here's what you'll find in the job details modal:

• An overview of the job details

• A summary of the input files used, along with a button to download them for a submitted job

• A summary of the Physics Constraintsassociated with your layout job

• A summary of the Design Parametersspecified for your layout job

• A board preview of the input files used to create your layout job

Available metadata

Overview

Quilter offers various job actions to help you efficiently iterate and organize your layout jobs. You can access these job actions in two locations: the Layout Jobs Overview page and the Candidate Details header.

Supported job actions