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    • Introduction
  • Design your schematic
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  • Physics Constraints
    • Overview
  • Routing Constraints
    • High Current Nets
    • Timing-sensitive Signals
    • Single-ended Impedance Control
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    • Bypass Capacitors
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  • Physics Rule Checks (PRCs)
    • Overview
    • Ground Plane Overlap
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  • Placement Parameters
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Define physics constraints

An overview of Quilter’s Circuit Comprehension step, outlining how to define and validate physics constraints for your PCB layout.

PreviousUpload your design filesNextSpecify design parameters

Last updated 10 days ago

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Next up in Quilter's submission process is Circuit Comprehension. This step aims to give Quilter insight into the main physics concerns associated with your design.

Quilter tries to automatically detect as many constraints as possible by analyzing object classes in your input files and inferring constraints from your project netlist. However, some constraints need to be manually defined.

Refer to the tables below for a summary of the physics constraints supported by Quilter.

Quilter treats all signals not represented in Circuit Comprehension as generic, low-speed digital signals. If your physics constraints are not yet supported by Quilter, we recommend pre-placing or pre-routing them before submission.

Routing Constraints

Placement Constraints

Validating constraints

Quilter uses Physics Rule Checks (PRCs) to determine if constraints defined in Circuit Comprehension are correctly implemented in each layout.

You can find more information about the Physics Rule Checks provisioned for each constraint listed above in Physics Rule Checks (PRCs).

The majority of physics constraints can be automatically detected by Quilter
Constraint
Details
Automatic?

Design high-current nets as traces with a specified width or as copper pours.

Automatically detected

Generate differential pairs with controlled lengths and impedances for high-speed digital signals.

Automatically detected

Impedance-controlled nets for RF nets or other fast, long, or sensitive traces.

Manual

Length matching for timing-sensitive interfaces such as DDR memory

Manual

High Current Nets
Differential Pairs
Single-ended Impedance Control
Timing-sensitive Signals
Constraint
Details
Automatic?

Position oscillators close to their drivers to minimize phase noise and startup issues.

Automatically detected

Ensure tight ground return loops for input and output paths to reduce EMI and voltage ripple.

Automatically detected

Ensure a stable, low-impedance signal path for power pins.

Automatically detected

Crystal Oscillators
Switching Converters
Bypass Capacitors