Differential Pairs

Instructions on defining differential pair constraints, including detection rules, limitations, supported impedances, and required fields.

Generates length and impedance-controlled differential pairs for high-speed digital signals.

Differential Pair Routing Limitations

Differential pair routing has the following limitations. We're working to expand these constraints to enable the development of more sophisticated designs:

1. Quilter cannot currently route differential pairs with multiple receivers ("multi-drop" or "fly-by" pairs). These will be detected but automatically ignored.

2. Quilter avoids differential pairs on 2-layer stack-ups to ensure they are always routed on top of a ground plane. We always route differential pairs as microstrip and are not yet able to do co-planar waveguide.

Automatic Detection

Nets with specific attributes will be automatically classified as differential pairs. The rules for this classification are:

• Nets must be in differentialpair or synonymous net class (75ohm etc)

• Net names must end in a set of supported paired suffixes that include any of the following:

Suffix	Description	Example
+ / –	Plus / Minus	TX+ and TX-
A / B	A / B	SSTXA and SSTXB
P / M	Plus / Minus	RFoutP and RFoutM (last character) ​USB_DPX and USB_DMX (second-to-last character)
P / N	Positive / Negative	DP and DN
t / c	True / Complement	ddr0_dqs_t and ddr0_dqs_c

Avoiding Power Nets Quilter will not interpret net names that start with V as a differential pair to avoid confusion with power net names

Recommended Patterns

Quilter starts by searching for accepted net classes, so make sure your pairs are part of an accepted net class. It then filters out net pairs ending with P and N to eliminate any single-ended impedance nets.

Pairs with inline resistors or capacitors

Differential pairs with resistors or capacitors in series will be detected separately by their net names and displayed in the UI as two separate differential pairs. Don't worry, though - these are combined during compilation.

Constraint Details

When Quilter detects a potential differential pair, it presents it for validation as part of the "Differential Pairs" section of the Circuit Comprehension step of job creation.

For each differential pair, you must specify:

• Positive paired net name

• Negative paired net name

• Target differential impedance

• Associated single-ended impedance

• Carrier frequency (in GHz)

Quilter uses this information to determine the appropriate trace width and spacing requirements for the specific stack-up that Quilter is using to generate your PCB layout.

If Quilter has incorrectly identified a differential pair, you can ignore it by clicking the Remove button on the row for that differential pair.

Supported differential impedance values Differential/single-ended impedances are currently limited to 100Ω differential (50Ω single-ended) and 85Ω differential (42.5Ω single-ended). We plan to add support for fully customized differential and single-ended impedance requirements shortly.

Physics Rule Checks

The PRCs that validate this constraint after compilation are:

FAQs

What is the highest frequency Quilter can handle?

Quilter's impedance control calculations are accurate and recommended for signals up to 6GHz.